· Nacho Planas
Memory's Pizza economics
Memory chips get cheaper almost every year, and the companies that make them have swung from record profits to near-bankruptcy roughly once a decade for fifty years. This is the long version: what a bit physically is, why the business behaves like a street of pizzerias with $20 billion ovens, how dozens of makers became three, and what the AI boom has and hasn't changed.
Disclaimer: Not investment advice. This is a history of an industry and an explanation of its technology. Figures are from company filings, standards bodies and the research firms named under each chart, as of late September 2026.
A product that keeps getting cheaper, made by companies that keep nearly dying
In October 1970 Intel started selling a chip called the 1103. It stored 1,024 bits and cost about a cent per bit, which was roughly what the magnetic memory it replaced cost. A flagship phone today carries 12 gigabytes of working memory, a little over 100 billion bits. At 1970 prices, that phone's memory alone would cost about a billion dollars.
That is the first half of the story: few manufactured goods have fallen in price as far or for as long as the memory chip. The second half is less cheerful. Of the dozens of companies that made memory chips in the mid-1980s, only a handful still do. Intel left. Texas Instruments, Motorola, NEC, Hitachi, Toshiba, Siemens and Mitsubishi left or were forced out. Micron, the last American DRAM maker, has seen its operating margin range from minus 58% to plus 49% of revenue, and its shares have lost between half and nine tenths of their value seven times.
Both halves have the same cause. The cost of storing a bit keeps falling because the factories that make memory keep getting more expensive and more productive, and a business built on very expensive, very productive factories selling an interchangeable product is a business that swings.
The easiest way I've found to see why is to picture a street of pizzerias. Every shop sells the same pizza, the ovens cost as much as $25 billion and take years to build, and each new oven bakes more for less. When the queue outside is long, everyone orders an oven. By the time the ovens arrive, the queue is gone. That's memory's pizza economics, and it has run the industry for fifty years.
The rest of this essay explains how that machine works, from the physics of a single cell to the decades-long fight between the United States, Japan, Korea and now China over who gets to run it, and then looks at what the AI boom has actually changed.
It's a long piece, in four parts: what a bit is and where it lives; the economics, told through a street of pizzerias; the history, in five acts; and the AI era.
Part I. What a bit is
An answer to one question
A bit, short for binary digit, is the smallest piece of information there is: a single answer to a yes-or-no question. On or off, charged or empty, 1 or 0. Eight of them make a byte, which has 256 possible combinations, enough to encode a letter. Everything a computer handles, from a spreadsheet to the weights of a language model, is ultimately a long row of these answers.
The numbers involved are hard to picture. A single current DRAM chip, a 16-gigabit DDR5 die, holds about 17 billion bits, each in its own microscopic cell. Nvidia's Rubin GPU carries 288 gigabytes of stacked memory in a single package, around 2.5 trillion bits.
A processor needs all this because it holds very little itself. Its registers, where the arithmetic actually happens, and the caches beside them add up to megabytes; the programs and data it works on run to gigabytes or terabytes. Everything outside those few megabytes (the program, the data, the intermediate results) has to be fetched from somewhere and written back somewhere. Think of someone working at a desk. What's in their hands is the register. The desk itself is fast but small. There's a bookshelf in the room, an archive in the basement and a storage unit across town. Each step away is roomier and cheaper per shelf, and each takes longer to reach.
Computers solve the problem the way the person at the desk does: they keep whatever they're using right now close by and everything else further away, and shuttle data between the tiers all the time. The memory industry lives mostly in the middle two tiers, DRAM and NAND flash. The top tier, SRAM, is built into the processor by whoever makes the processor. The bottom one, the hard disk, belongs to a different industry of spinning platters and read heads.
The line through the middle of the pyramid matters as much as the tiers. DRAM and SRAM are volatile: cut the power and every bit vanishes. Flash and disks are non-volatile: they keep their contents for years without power. That single property decides what each technology is used for, and it comes straight from how the cells are built.
DRAM: a bucket that leaks
In 1966 Robert Dennard, an engineer at IBM, worked out how to store a bit with just two components: one transistor acting as a switch, and one capacitor acting as a tiny bucket for electric charge. A full bucket is a 1, an empty one a 0. IBM was granted the patent in June 1968, and nearly every DRAM made since has used his design.
The cells sit in a grid. Horizontal wires, called word lines, open a whole row of switches at once; vertical wires, the bit lines, carry each cell's charge out to amplifiers at the edge of the array that decide whether it was full or empty. The charge involved is so small that the amplifiers have to be very sensitive, and reading a cell drains it, so every read is immediately followed by a write that puts the value back.
The bucket also leaks. Charge seeps out through the transistor and the surrounding silicon within milliseconds, so the chip has to read and rewrite every cell continuously, cycling through all of them every 64 milliseconds under the standard. That constant upkeep is where the "dynamic" in dynamic random-access memory comes from, and it's why DRAM forgets everything when the power stops: nothing is left to do the refreshing.
The alternative, static RAM, uses six transistors wired into a loop that holds its state as long as power flows. It needs no refresh and is much faster, but six transistors take far more room than one transistor and a capacitor. So SRAM lives inside processors as cache, where speed is worth any price, and DRAM does the bulk work outside.
DRAM has a scaling problem that gets worse every generation. To shrink a cell, you shrink the capacitor's footprint, but it still has to hold enough charge for the amplifiers to read reliably. The only way out is up: modern DRAM capacitors are tall, thin cylinders, with height-to-width ratios approaching 100 to 1, like a pencil-thin skyscraper on a postage stamp. Progress has slowed accordingly. Since about 2016 the industry has been stuck in the "10-something nanometre" range, and has named its steps 1x, 1y and 1z, then, having run out of letters, 1α, 1β and 1γ. Samsung began using extreme ultraviolet lithography in DRAM in 2020; Micron's 1γ in 2025 was its first node to need it.
Flash: electrons behind a wall
A flash cell has no capacitor. It is a single transistor with an extra layer buried in its gate, wrapped completely in insulation. Apply a high enough voltage and electrons are forced through the thin insulator, called the tunnel oxide, into that buried layer. Remove the voltage and they're stuck: there's no conducting path out. They stay for years, with or without power.
The trapped electrons change how easily the transistor switches on. To read the cell, the chip checks the voltage at which it starts to conduct, called the threshold voltage, and infers how much charge is inside. Erasing means pulling the electrons back out with a voltage of the opposite sign.
The price of that persistence is wear. Every time electrons are forced through the oxide, it's damaged slightly, so a flash cell can only be rewritten a limited number of times before it becomes unreliable. Writing is also slow compared with DRAM, and data can't be rewritten in place: flash is written in pages of a few kilobytes but erased only in much larger blocks.
There are two ways to wire the cells together. NOR flash gives each cell its own connection, which allows fast random reads; it was used to hold code in phones and PCs. NAND flash strings cells in series, like beads on a thread, sharing connections along the string. That makes it slower to read any single cell but far denser and cheaper, and density won. NAND is what's in phones, memory cards and solid-state drives.
Because of wear and the page-and-block rules, raw NAND is almost unusable on its own. Every SSD and phone carries a controller, effectively a small computer, that spreads writes evenly across cells, corrects errors, maps the addresses software asks for to wherever the data actually sits, and tidies up blocks in the background. A good part of the value in a modern SSD sits in that controller and its firmware, not in the flash.
More bits in each cell
The early flash cells stored one bit: charged or not. In the late 1990s engineers realised the amount of charge could be read more finely. Distinguish four levels and a cell holds two bits; eight levels, three bits; sixteen, four.
These are known as SLC, MLC, TLC and QLC: single, multi, triple and quad-level cell. Intel sold MLC NOR flash in 1997 and SanDisk had an MLC product even earlier. TLC NAND was in production by 2008, and the first QLC SSD arrived in 2018. The trade-off never goes away: every extra bit cuts the same voltage window into twice as many slices, so the levels crowd together, reading needs more precision and more error correction, and the cell tolerates fewer rewrites. The gains also shrink: going from one bit to two doubles capacity, from three to four adds only a third. Five-bit cells exist in laboratories, but the returns are thin.
Building upward
By around 2013 flat NAND was running out of room. Cells had shrunk to about 15 nanometres, so small that a handful of electrons separated a 1 from a 0 and neighbouring cells disturbed one another. The answer was to stop shrinking and start stacking.
In 3D NAND, the chip starts as a sandwich of dozens, and now hundreds, of alternating thin layers deposited on the wafer. Then vertical holes are etched straight down through the whole sandwich, and each hole becomes a string of cells, one per layer, like floors in a lift shaft. Toshiba described the idea in 2007; Samsung shipped the first product, with 24 layers, in August 2013.
The race since then looks like a skyline. Each new generation adds floors, and the hard part is no longer drawing small features but etching holes deep and straight enough through hundreds of layers, often in two or three stages stacked on top of each other. Manufacturers have also moved the control circuitry underneath the memory array, or, in the Kioxia and Sandisk design, built it on a separate wafer and bonded the two face to face. Samsung's newest parts are reported at about 430 layers.
DRAM can't do the same trick, at least not yet, because its capacitors don't stack the way flash cells do. Researchers are working on 3D DRAM, but for now the DRAM industry has found a different way to go vertical: stack whole chips instead of cells. That is high-bandwidth memory, and it is the centre of Part IV.
Part II. The pizza street
The technology explains what memory is. It doesn't explain why the business behaves the way it does. For that, back to the street of pizzerias from the introduction, and its very strange set of rules.
The pizzerias are the memory makers. Their ovens are fabs, factories that now cost $15 to $25 billion each and take two to three years to build and fit out. What comes out of the oven is a pizza: a wafer, a 300-millimetre disc of silicon. Each pizza is cut into slices, the individual chips, called dies. And the customers don't pay by the pizza or by the slice. They pay by the calorie, and the calorie is the bit.
The recipe is the manufacturing process, what the industry calls a node. A better recipe packs more calories onto the same pizza, by shrinking cells, stacking more layers or squeezing more bits into each cell. Burnt slices are dies that fail testing; the share that come out right is the yield, and a new recipe always starts with a lot of burnt slices.
Now add the rules that make this street so unusual.
Every calorie is the same. A memory module from one maker drops into the same server slot as a module from any other, because the standards body JEDEC specifies everything from the pin layout to the timing. Customers designed the market that way on purpose: PC makers and cloud companies want at least two suppliers for every part. So a pizzeria can't charge more for its calories because of the brand on the box. When calories are scarce, everyone's price goes up; when they're plentiful, everyone's goes down.
The oven is almost the whole cost. Flour and tomato are cheap. What makes memory expensive is the fab, the equipment in it and the depreciation on both. Once an oven exists, baking one more pizza costs very little, so a pizzeria keeps baking as long as the price covers its cash costs, even if it doesn't cover the oven. In a glut that pushes prices toward the cash cost of the least efficient kitchen still open.
Recipes keep improving, but they need new utensils. A new node gives more bits per wafer, historically enough to cut the cost per bit by 20% to 30% a year. But each new recipe needs new lithography and etching tools, so even a pizzeria that builds no new ovens has to spend heavily every year just to stay current. Stop, and your cost per calorie falls behind everyone else's.
Ovens take years; appetite changes in a quarter. This is the rule that makes the street cyclical.
When calories are short, prices jump and every pizzeria earns a fortune. Each one, looking at the same queue out of the door, orders more ovens, which is perfectly sensible for each of them individually. Two or three years later the ovens all switch on together, usually just as the queue gets shorter, and the street is buried in pizza. Prices fall to cash cost, the weakest kitchens close or are bought, and the survivors stop building. The shortage that follows starts the loop again. Economists call this a cobweb cycle; farmers have known it for centuries as the hog cycle. Memory is the same thing with a $20 billion oven.
There's also a trap inside the loop. A pizzeria that stops building while its rivals keep going has less to sell when the next shortage arrives, and loses market share it may never get back. So everyone has a reason to keep building even when they suspect the street already has too many ovens.
What a calorie costs
Put the rules together and the first result is relentless deflation. John McCallum, a computer scientist, spent decades collecting advertised prices for memory and storage, going back to the 1950s.
On a log scale, the price of storing a megabyte falls in something close to a straight line for seventy years, across four completely different technologies. In 1957 a megabyte of memory would have cost about $400 million, had anyone been able to build one; by 2024 a megabyte of DRAM cost about a sixth of a cent. The bumps along the way are the cycles, and they look small only because the scale is so vast.
Micron's own filings tell the same story for DRAM in more detail. Every year its annual report states how much the average price per bit changed. Compound those changes and you get the price of a bit over three decades.
A bit of DRAM sold in fiscal 2025 for about 1/4,700 of its 1996 price, a decline of roughly a quarter every year for 29 years. In 19 of those years the price fell, and the good stretches (2017–18, 2021–22, 2024–25) each lasted two years before the slide resumed. Fiscal 2026, which I'll come back to in Part IV, is a third consecutive rise, the longest in the filings, and yet it has only lifted the price per bit back to about its 2012 level.
Where the profit comes from
If prices fall almost every year, how does anyone make money? Because costs fall too, and profits depend on which falls faster.
Micron's annual reports from fiscal 2012 to 2016 show both numbers side by side. In 2013 the price of a bit fell 11%, but the cost of making one fell 25%, and margins started to climb toward the good year that followed. In 2016 the price fell 35% while cost fell only 17%, and the operating margin dropped to 1%. A falling price is the normal state of the business; a bad year is one where it falls faster than costs do.
Fixed costs make those swings brutal. Take a simple memory maker with revenue of 100, cash costs of 50 and depreciation of 20, all roughly fixed in the short run. Its operating profit is 30, a 30% margin. If prices rise 30%, revenue goes to 130 with the same costs, and profit doubles to 60. If prices fall 30%, revenue is 70 and profit is zero. Move prices down another notch and the company is losing money on every wafer it bakes, but still bakes them, because stopping would lose more.
That arithmetic, repeated across an entire industry, is why memory stocks behave the way they do. The rest is history.
Part III. Sixty years in five acts
The pizza economics haven't changed in sixty years. The pizzerias have, again and again.
Act one: the chip that killed the core (1953–1979)
Before chips, computers remembered with magnets. From 1953, when MIT's Whirlwind computer switched to it, the standard was core memory: grids of tiny ferrite rings threaded onto wires, each ring magnetised one way for a 1 and the other for a 0. It was non-volatile, reliable and assembled largely by hand. By around 1970 it had come down to about a cent per bit.
Semiconductor memory arrived in two steps. Dennard's cell showed how simple a memory cell could be. Then Intel, founded in 1968 by Robert Noyce and Gordon Moore, made memory its first business. The Intel 1103, launched in October 1970, still used three transistors per bit rather than Dennard's one, but it matched core memory's price per bit while being far smaller, faster and cheaper to build into a computer. Within two years it was the best-selling semiconductor chip in the world. It's worth remembering that the company now synonymous with microprocessors started life as a memory maker.
The 1970s were an American decade. Intel, Texas Instruments, Motorola, National Semiconductor and a Texas start-up called Mostek fought over each new generation. Mostek's MK4096, a 4-kilobit chip from 1973, sent the row and column halves of each address over the same pins one after the other. That let it fit in a 16-pin package where competitors needed 22, which made circuit boards cheaper, and the trick became standard. Its 16-kilobit successor dominated the market in the late 1970s.
In October 1978, in the basement of a dental office in Boise, Idaho, four engineers started a design consultancy called Micron. Around 1980 they got money from J.R. Simplot, a potato magnate who had grown rich selling frozen fries to McDonald's, and moved into making memory chips. It would be the one American DRAM maker to survive what came next.
Act two: Japan's decade (1980–1990)
In March 1980 Richard Anderson, a manager at Hewlett-Packard, presented the results of HP's tests on 16-kilobit DRAMs from its suppliers. The Japanese chips had several times fewer failures than the American ones. For an industry that had assumed Japan made cheap copies, it was a shock.
Japan's electronics giants (NEC, Hitachi, Fujitsu, Toshiba and Mitsubishi) had spent the late 1970s in a government-sponsored research programme on very-large-scale integration, and they were part of industrial groups with patient bank financing behind them. That mattered enormously on the pizza street. When prices collapsed, a Japanese conglomerate could keep building ovens, funded by its bank and its other divisions. An American company that only made chips had to answer to shareholders every quarter.
The collapse came in 1985. A slump in computer demand met a wave of new Japanese capacity. In Japan, the price of a 64-kilobit chip went from $2.30 in late 1984 to about 90 cents, below what it cost to make, and worldwide DRAM sales fell by more than half in a year. American chipmakers lost more than a billion dollars and tens of thousands of jobs. In October 1985 Intel announced it was leaving the DRAM business altogether. Its share of the market, 83% in 1974, had fallen to about 1% by 1984. Andy Grove later described the moment he and Moore decided: they imagined being fired and replaced by a new management team, asked what that team would do, and concluded it would get out of memory. So they did it themselves, and bet the company on microprocessors instead.
Micron filed an anti-dumping complaint against Japanese 64-kilobit chips in June 1985, and in September 1986 Washington and Tokyo signed the Semiconductor Agreement. Japan agreed to monitor its export prices so that they wouldn't fall below a "fair market value", and a side letter kept secret at the time set a goal of 20% of the Japanese chip market for foreign suppliers. By 1987 Japanese companies made about 80% of the world's DRAM.
The agreement had an effect nobody in Washington planned. Price floors on Japanese chips, and Japanese production cuts to respect them, made DRAM scarce and expensive in 1987 and 1988. The companies outside the agreement, which were free to sell at whatever the market paid, were Korean.
Act three: Korea's bet (1983–2001)
In February 1983, from a hotel in Tokyo, Samsung's founder Lee Byung-chul announced that his company would make memory chips. Much of the business world thought it was reckless: Samsung was a trading and consumer-electronics group, several generations behind in chipmaking, entering a market that was about to crash. By the end of 1983 it had a working 64-kilobit DRAM, making Korea the third country to produce one. Hyundai founded its own semiconductor arm the same month as Lee's declaration, and LG followed.
What Samsung did next is the most important single decision in this history. It kept building through the 1985 crash, while its chip business lost heavily, and it had fabs ready when prices recovered under the 1986 agreement. It overtook Toshiba, Hitachi and NEC to become the largest DRAM maker in the world in 1992, and the largest memory maker overall in 1993. It has held the DRAM lead ever since. On the pizza street, the kitchen that kept its ovens hot through the bad year owned the next good one.
The mid-1990s brought the first great personal-computer boom. PC sales surged, Windows 95 was hungry for memory, and prices and margins went up together: Micron earned 44% of revenue as operating profit in fiscal 1995. Then the new ovens arrived. A 16-megabit chip that sold for about $70 wholesale at the end of 1995 went for about $7 the following summer. DRAM prices fell about 51% over 1996 and another 65% over 1997, and in three years the price of a megabit went from more than three dollars to less than sixteen cents.
The Asian financial crisis of 1997–98 finished the job. The Korean won lost more than half its value, and the government pushed the country's conglomerates to swap businesses so that each would be a single, stronger player in fewer industries. In the memory version of this "Big Deal", LG handed its chip business to Hyundai in 1999 for about $2 billion. The combined company, renamed Hynix in 2001, was so indebted that its creditors converted about 3 trillion won of loans into shares and effectively owned it for a decade, until SK Telecom bought a controlling stake in 2012 and renamed it SK hynix.
Japan consolidated too. In 1999 NEC and Hitachi merged their DRAM operations into a company later called Elpida, which absorbed Mitsubishi's in 2003. In Germany, Siemens spun off its chip business as Infineon, which in 2006 spun off its memory division as Qimonda. Taiwan built a cluster of DRAM makers, including Powerchip, ProMOS, Nanya, Winbond and Inotera, mostly on technology licensed from the Japanese, American and German leaders.
Act four: flash, the other memory (1984–2016)
At Toshiba, an engineer named Fujio Masuoka had been working on a memory that could keep data without power and be erased electrically all at once. He presented the NOR version in 1984 and the NAND version in 1987. A colleague, Shoji Ariizumi, suggested the name: erasing the whole chip in one go reminded him of a camera flash. Toshiba gave Masuoka a modest bonus; years later he sued for a share of the profits, and in 2006 settled for ¥87 million.
Intel was first to sell flash in volume, with a NOR chip in 1988 that went into PCs and, later, mobile phones. In June of the same year three engineers, Eli Harari, Sanjay Mehrotra and Jack Yuan, founded a company called SunDisk to build storage systems out of flash. It renamed itself SanDisk in 1995. Its advantage was in the system around the chips: controllers, error correction, and patents on multi-level cells, which it licensed widely.
In 2000 SanDisk and Toshiba formed a joint manufacturing venture, FlashVision, whose production soon moved to Toshiba's Yokkaichi site in central Japan. Flash Partners followed in 2004, Flash Alliance in 2006 and Flash Forward in 2010. The structure survives today: Sandisk and Kioxia, Toshiba's former memory business, share the output of eight fabs between them, one of the few examples of two competitors running the ovens jointly.
NAND needed a mass product, and it found several. Digital cameras came first. In November 2005 Apple, about to launch a flash-based iPod nano, signed long-term supply deals with Hynix, Intel, Micron, Samsung and Toshiba and prepaid $1.25 billion for NAND to be delivered through 2010. Customers paying memory makers up front to guarantee supply is supposedly a novelty of the AI era; Apple did it two decades ago. Smartphones came next, then solid-state drives, which replaced hard disks in laptops in the 2010s and increasingly in data centres.
Flash also has its cautionary tale. In 2015 Intel and Micron announced 3D XPoint, a new kind of memory meant to sit between DRAM and NAND: faster than flash, cheaper than DRAM, non-volatile. Intel sold it as Optane. It worked, but it never found a price that justified the gap it was meant to fill: DRAM kept getting cheaper from above and flash kept getting faster from below. Micron quit the technology in 2021, and Intel began winding down Optane in 2022 with a charge of more than half a billion dollars. A new memory tier has to be much better or much cheaper than the tiers on either side of it, for long enough to recover its ovens.
The flash and DRAM stories also share a person. Sanjay Mehrotra, SanDisk's co-founder and later its chief executive, became Micron's chief executive in 2017.
Act five: the war of attrition (2007–2016)
By the mid-2000s the DRAM street was crowded again: the Korean pair, Micron, Elpida, Qimonda and a handful of Taiwanese kitchens. Many of them expanded ahead of a PC upgrade cycle expected with Windows Vista in 2007, and the upgrade disappointed. Prices started falling in 2007. Then the financial crisis hit demand, and in Micron's accounts the average DRAM price dropped 51% in fiscal 2008 and 52% in fiscal 2009.
This time the losses were terminal for some. Qimonda, then one of the largest DRAM makers in the world, filed for insolvency in Munich in January 2009. Taiwan's government tried to merge its DRAM makers into a single national champion, the Taiwan Memory Company, and the plan fell apart the same year. Japan's development bank put ¥30 billion of equity into Elpida in 2009, but the strong yen after the crisis made Japanese exports expensive, and in February 2012 Elpida filed for bankruptcy with ¥448 billion of liabilities, the largest failure of a Japanese manufacturer since the Second World War. Micron bought it, closing the deal in July 2013, and later bought out its Taiwanese partner Inotera as well.
By 2013 there were three companies making most of the world's DRAM: Samsung, SK hynix and Micron. Nanya and Winbond survived in Taiwan, focused on smaller and specialised markets; Powerchip turned itself into a contract foundry.
NAND consolidated more slowly, and more through deals than failures. Western Digital, a hard-disk maker, bought SanDisk for about $16 billion in 2016. Toshiba, desperate for cash after huge losses at its American nuclear subsidiary Westinghouse, sold its memory business in 2018 for about ¥2 trillion to a group led by Bain Capital that included SK hynix; it became Kioxia and listed in Tokyo in December 2024. Intel sold its NAND business to SK hynix for $9 billion, in stages completed in 2025, and it now operates as Solidigm. Western Digital spun Sandisk back out as a separate company in February 2025.
Almost nobody on this street left by choice. They failed, were merged by governments, or were sold by parents that needed the money.
sold off in 1985
quit DRAM in 1985
memory sold in 2018
bankrupt in 2012, now Micron
bought by SK in 2012
DRAM leader since 1992
leads in HBM
last US DRAM maker
Toshiba's flash, listed in 2024
spun off again in 2025After the shake-out: three kitchens, same cycle (2016–2023)
With three DRAM makers holding almost the whole market, many investors decided the cycle had been tamed. Three disciplined players, the argument went, wouldn't flood the market again. The next seven years tested that.
The cloud build-out produced a boom in 2017 and 2018: DRAM prices rose about 20% and then about 35%, and Micron's operating margin reached 49%, a record at the time. Then customers who had stockpiled chips during the shortage stopped ordering while they worked through their inventories. TrendForce's price surveys show DRAM contract prices dropping by about 50% between the last quarter of 2018 and July 2019. The pandemic brought another surge in demand for laptops and servers. When it faded, the industry went into its worst downturn in more than a decade. In fiscal 2023 Micron's revenue fell by half and its operating margin was minus 37%, its deepest loss since 2003. Samsung, which had long refused to cut production in downturns, announced output cuts in April 2023.
Three kitchens made the cycle less deadly, not less violent. Nobody went bankrupt in 2023. But the oven lag, the shared exposure to the same customers and the fixed-cost arithmetic were all still there.
Shareholders feel it before the income statement shows it. In every completed down-leg since 1995, Micron's shares have fallen at least 50% from peak to trough, and twice they lost more than 90%. The fall usually starts while the reported numbers still look excellent, because the market is pricing the next ovens, not the last quarter.
| Era | Who led | Why they won | How it ended |
|---|---|---|---|
| 1970s | Intel, Mostek, TI | Invented the product, set the standards | Japanese quality and capital |
| 1980s | NEC, Hitachi, Toshiba | Quality, bank-backed investment through downturns | Trade agreement, Korean entry, the 1990s price collapse |
| 1990s–2000s | Samsung, then Hynix | Invested through the bust, scale, state support | A war of attrition that left three |
| 2010s | Samsung, SK hynix, Micron | Survival, scale, balance sheets | Still running; now joined by China's CXMT |
Part IV. The AI era
The AI boom is the longest queue the street has ever seen, and it's lining up for a dish only three kitchens can make.
The memory wall
For decades, processors got faster much more quickly than memory could feed them. Engineers call this the memory wall, and AI has made it the central problem in computer design.
In a 2024 paper, Amir Gholami and colleagues at Berkeley measured twenty years of hardware: the peak arithmetic of the chips used for AI had grown about three times every two years, while the bandwidth of the DRAM feeding them had grown about 1.6 times. Compounded, that's a gap of several hundred times.
Large language models run straight into that gap. To generate each new word, a model has to read all of its weights from memory. Take a model with 70 billion parameters stored at one byte each: 70 gigabytes that must be read for every token of output. An Nvidia H100, with 3.35 terabytes per second of memory bandwidth, can do that at most about 48 times a second for a single user, however fast its arithmetic units are. A server reading the same weights from eight channels of DDR5 would manage about six. For this kind of work, the speed of the memory, not the processor, sets the speed of the system.
High-bandwidth memory: stacking the slices
High-bandwidth memory, or HBM, attacks the problem by changing the shape of the pipe rather than the speed of the cells. SK hynix and AMD proposed it around 2010, JEDEC standardised it in 2013, and it first shipped in AMD's Radeon R9 Fury X graphics card in June 2015.
The DRAM dies in an HBM stack are ordinary DRAM in their cells. What's different is everything around them. Each die is thinned to a fraction of a normal wafer's thickness, and thousands of vertical connections called through-silicon vias are drilled through it. Eight, twelve or sixteen dies are stacked on top of a base logic die and bonded together. The whole stack then sits right next to the processor on a slab of silicon called an interposer, which carries over a thousand wires between the two. A conventional DDR5 module talks to the processor over 64 data wires from several centimetres away. HBM3 uses 1,024, and HBM4 2,048, over a few millimetres.
Each generation has widened the pipe. A single HBM4 stack moves about 2 terabytes a second at the standard's speed, roughly forty times a DDR5 module, and Nvidia runs the ones in its Rubin GPUs faster still.
In pizza-street terms, HBM is a lasagna. It takes several layers, each one baked separately, stacked and assembled by hand, and a mistake in any layer ruins the whole dish. That has two consequences that matter enormously for the business.
The first is that it eats ovens. Stacking, thinning, the vias and the lower yields of a complex assembly mean an HBM bit uses far more wafer than an ordinary DRAM bit. Micron said in 2024 that HBM3E consumed about three times the wafer supply of DDR5 for the same number of bits, and has since said the ratio is widening toward four. Every lasagna served is three or four pizzas that didn't go to the ordinary customers. When AI demand for HBM exploded, it drained capacity from ordinary DRAM, and ordinary DRAM prices soared too.
The second is that a lasagna is not a commodity, at least not yet. Each HBM product has to be qualified with each customer's processor, a process that can take many months; the stacking and bonding steps are hard, and yields vary a lot between makers. SK hynix bet early and led: it was first to mass-produce HBM3, for Nvidia's H100 in 2022, and analysts widely credit its bonding process for its yields. From HBM4 on, the base die at the bottom of the stack is increasingly built with a logic manufacturing process; SK hynix has TSMC build its own, so the memory maker now depends on a foundry partner as well.
That lead is real, but it's a lead rather than a wall. According to Counterpoint Research, SK hynix still had half of the HBM market in the second quarter of 2026, down from almost two thirds a year earlier, while Samsung more than doubled its share. A premium product in a commodity industry tends to attract competitors until it becomes a commodity itself; the only question is how long that takes.
The strangest cycle yet
All of this has produced the sharpest upswing in the industry's history.
On TrendForce's forecast, the DRAM market in 2026 will be about four times the size of its 2018 record. Micron's fiscal 2026 filings show DRAM prices per bit up about 140% year on year over nine months, on top of rises in the two previous years. In the three months to May 2026, Micron earned 81 cents of operating profit on every dollar of revenue, on a non-GAAP basis. The previous best full year in its forty-year record was 49%.
The pizza-street rules are all visible in it. Growth has come almost entirely from price, not volume, because the ovens are full. Every major supplier is building new fabs, and none of them expects that capacity to arrive in meaningful amounts before 2028. And the market has already staged one violent sell-off: Micron's shares dropped almost 40% between late June and late July 2026, without any fall in memory prices, as leveraged holders were forced to sell.
What's genuinely new is how the pizzerias are selling. Instead of pricing every quarter against the spot market, the big memory makers have signed multi-year agreements with their largest customers, with minimum volumes, price floors and ceilings, and in many cases cash deposits paid up front. Apple's 2005 flash deal was a small precedent. Today the agreements cover a meaningful share of output at Micron, SK hynix, Samsung and Sandisk. They have never been tested in a real downturn, when a buyer's incentive to walk away is strongest.
Inference, and flash moves closer to the processor
The other shift is in what AI asks of memory. Training a model is a burst of arithmetic over data that changes constantly. Serving it to millions of people, which the industry calls inference, is mostly reading: the same weights over and over, plus a record of every conversation in progress.
That record is the KV cache. For every token a model has already processed, it keeps two vectors, a key and a value, which each later token consults to decide what to pay attention to. Keeping them takes memory; discarding them means redoing the arithmetic for the whole context every time a new token is generated. Longer conversations, longer documents and agents that work on a task for hours all make the cache grow. It starts in HBM, spills into ordinary DRAM and increasingly onto SSDs, because at scale a gigabyte of flash costs far less than the GPU time needed to rebuild what it holds.
That has pulled NAND into the AI story. Sandisk proposed a new product in 2025, high-bandwidth flash, or HBF: NAND dies stacked and connected like HBM and placed beside the processor, trading some speed for many times the capacity. SK hynix has joined Sandisk in writing a standard for it, and the first samples are due around the turn of 2027. The bet turns NAND's main weakness into a non-issue: flash wears out when it's rewritten often, and the weights of a deployed model are written once and then read billions of times. Whether it finds its market, or goes the way of Optane, is one of the more interesting open questions in the industry.
China returns the street to crowded
The last new element is a new cook. ChangXin Memory Technologies (CXMT), founded in 2016 with heavy state backing, now makes about a tenth of the world's DRAM, according to Counterpoint, and listed on the Shanghai stock exchange in July 2026. Its NAND counterpart, YMTC, was put on the US Entity List in December 2022, cutting it off from American equipment, but has kept growing inside China.
A state-funded entrant changes the pizza-street arithmetic in one important way. The shake-outs of the past depended on money running out: the weakest kitchen closed because nobody would fund another bad year. A kitchen financed by a government doesn't have to close, and doesn't have to stop building when prices fall. That doesn't make it more efficient. It does make it harder for the next bust to clear the street.
What sixty years of history say
Each era of this industry came with a story about why the old rules no longer applied. Japan had patient bank capital; Korea had the state behind it; the three survivors of the 2010s had discipline; the AI era has HBM and long-term contracts. Each story was partly true. Looking at the whole record, here is what I think it actually shows.
- The bit always gets cheaper. Over any decade, the price per bit falls. Profits come from costs falling faster, and the rare years when prices actually rise are the peaks.
- The oven lag guarantees the cycle. Consolidation reduced the number of kitchens. It didn't change the fact that ovens take years and demand changes in quarters.
- Balance sheets decide who survives. Samsung in 1985, Micron in 2012, SK hynix's creditors in the 2000s: the winners were the ones who could keep baking through the bad year.
- Differentiation arrives, and then decays. NOR flash for code, multi-level cells, SanDisk's controllers, and now HBM all earned premiums before competitors caught up. The qualification process makes HBM's premium stickier than most, but not permanent.
- Governments never stay out. The 1986 trade agreement, Korea's forced mergers, Japan's rescue of Elpida, America's chip subsidies and China's state funds have all shaped the industry as much as any engineer.
What's actually different now is real too: a bottleneck in assembly rather than in chips, customers paying cash years in advance, and a buyer base concentrated in a handful of cloud companies rather than millions of PC buyers. What hasn't changed is the pizza street. The ovens still take years to build, every new recipe still makes a calorie cheaper, and when the queue outside eventually shortens, the gap between the price of a bit and the cost of making one will decide, once again, who had a good cycle.